1. Field of the Invention
This invention relates to microelectronic devices incorporating conductive straps or contacts. More particularly, it is concerned with the method and structure for forming a conductive strap or the like.
2. Description of the Prior Art
As the dimensions of microelectronic devices decrease, one important concern is the upper surface area of the circuit. In particular, it is important that the surface area of an integrated circuit be condensed into as small a region as possible so as to save such surface area or so-called "real estate." One problem with condensing various devices into smaller and smaller areas is that as the scaling increases, it is necessary that the processing steps satisfy the requirements for each device in a localized area.
For example, in the fabrication of an SRAM cell including a conductive layer such as a gate, it is often necessary to remove an insulating layer, such as an oxide over the gate in order to form a strap (local interconnect) or the like between the gate and an active region, such as a moat region. In the course of removing the insulating layer, typically by an etching process, another conductor, such as unrelated gate in the vicinity where the strap is to be contacted to the moat, may be inadvertently exposed. That is to say, if the insulating layer over the unrelated gate is completely etched away prior to forming the strap, the unrelated gate may be disadvantageously shorted to the first gate when the strap is formed.
Conventionally this problem is treated by keeping unrelated gates at least one registration tolerance away from the site where the strap will be formed so that no such undesirable shorting can occur. What is needed is a method which will accommodate the etching requirements for formation of the strap yet allow the unrelated gate to be moved closer to the area where the strap will be formed, so that real estate may be saved.